BitBank Software

I've heard people call this big and little-indian also. No, this is not about cowboys and indians, but about the direction of bytes in a word within a CPU architecture. The name big-endian and little-endian is borrowed from the story of Gulliver's Travels. If you remember this story, you should remember that the lilliputians (the tiny people) were divided into two camps: those who ate their eggs by opening the 'big' end (big-endians) and those who ate their eggs by opening the 'little' end (little-endians). In terms of CPU architectures, this name refers to which direction the bytes of a word are stored in memory. Each CPU manufacturer seems to have chosen randomly which one they liked. Intel has always done things the 'little-endian' way while Motorola has always done things the 'big-endian' way. It is also worth noting that some CPU's can work both ways; for example, the Hitachi SH3/SH4 RISC processors (used in many Windows CE machines) can be configured either way and can switch schemes after a reset. There are advantages and disadvantages to each method which I will explain below. A big-endian architecture stores the most significant byte at the lowest address offset while little-endian architecture stores the least significant byte at the lowest address offset. the 32-bit hex value 0x12345678 would be stored in memory as follows:

Address         00    01    02     03
----------     --    --    --     --
big-endian     12    34    56     78
little-endian 78    56    34    12

As you can see above, reading a hex dump is certainly easier in a big-endian machine since we normally read numbers from left to right (lower to higher address). Listed below are the pros and cons of each architecture (as far as I'm concerned).

Big-Endian Pros

1) Easier to read hex dumps.
2) Most bitmapped graphics (displays and memory arrangements) are mapped with a "MSB on the left" scheme which means that shifts and stores of graphical elements larger than a byte are handled naturally by the architecture. This is a major performance disadvantage for little-endian machines since you have to keep reversing the byte order when working with large graphical elements.
3) When decoding variable length bit codes (compressed data) such as Huffman and LZW, you can use the code word as an index into a lookup table if it's encoded MSB to LSB (big-endian); see my FAX article for more info on this. The same goes for encoding since the shifted bits would then have to be mirrored to generate such codes on a little-endian machine.

Big-Endian Cons

1) Reading a value of the wrong word size will result in an incorrect value; when done on little-endian architecture, it can sometimes yield a correct result.
2) Most big-endian architectures (non-Intel) do not allow words to be written on non-word address boundaries (odd addresses). Intel allows odd address reads and writes (they get broken into 2 separate operations) which makes it easier for programmers, but more difficult for hardware designers.

The pros and cons of little-endian are basically the opposites of those listed above. Intel added a nice instruction to help this situation starting with the 486. The BSWAP instruction reverses the byte order within a 32-bit data register. That's about all that needs to be said on this topic. There are some who have turned this into a religious battle, but if you look at it objectively, there aren't any real important differences between the two architectures. As as side note, the Internet commitee chose big-endian order for use within network data packets; they call it 'network byte order'.

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